- thank you to all the waferians out there 🫶 🧇wafer @wafer_ai1 trillion tokens a day on @OpenRouter!!105334
- JVRT @gpuemi: we’re partnering with @youdotcom to bring Wafer’s inference to developers through its new Inference Router! access @wafer_ai through one OpenAI-compatible API, with multi-provider failover and built-in web search from link in thread 🧵You.com @youdotcomIntroducing Inference Router: enterprise-grade inference on demand. Kimi K3, GLM 5.3, DeepSeek V4.1 Flash, Qwen3.8 Flash, Muse Spark 1.3, Mercury 3 and more, available with an uptime SLA of at least 99.9%. US hosting and web search built in.0601.8K
- JVRT @gpusteve: we’re partnering with @youdotcom to bring Wafer’s inference to developers through its new Inference Router. access Wafer through one OpenAI-compatible API, with multi-provider failover and built-in web search from link in thread 🧵You.com @youdotcomIntroducing Inference Router: enterprise-grade inference on demand. Kimi K3, GLM 5.3, DeepSeek V4.1 Flash, Qwen3.8 Flash, Muse Spark 1.3, Mercury 3 and more, available with an uptime SLA of at least 99.9%. US hosting and web search built in.0601.5K
- JVRT @wafer_ai: we’re partnering with @youdotcom to bring Wafer’s inference to developers through its new Inference Router. access Wafer through one OpenAI-compatible API, with multi-provider failover and built-in web search from link in thread 🧵You.com @youdotcomIntroducing Inference Router: enterprise-grade inference on demand. Kimi K3, GLM 5.3, DeepSeek V4.1 Flash, Qwen3.8 Flash, Muse Spark 1.3, Mercury 3 and more, available with an uptime SLA of at least 99.9%. US hosting and web search built in.0704.2K
- JVRT @rauchg: DeepSeek v4.1 Flash (1017) is now included in ▲ Token Pass. Fast, mind-bogglingly cheap, and served with ZDR (zero-data retention). It's a phenomenal model to run subagents that execute plans conceived by larger and more expensive models. You can port TypeScript to Rust 10 times and not run out of credits 😂Vercel Developers @vercel_devDeepSeek V4.1 Flash 1017 is now included in Vercel Token Pass. • New weights from DeepSeek • 1M context window • No config change Get $80 of tokens for $30/mo ↓023059.4K
- JVRT @risashimmura: we’re powering token pass on @vercel 🤝 @wafer_ai available as an add-on to vercel pro. more models coming soon0501.2K
- JVRT @vercel_dev: DeepSeek V4.1 Flash 1017 is now included in Vercel Token Pass. • New weights from DeepSeek • 1M context window • No config change Get $80 of tokens for $30/mo ↓01701
- the most comprehensive gpu perf engineering resource just got even more comprehensive to the gpu/ai perf engineers, what else is this repo missing?wafer @wafer_aiwe're doing a massive update on Wafer's popular open source guide to GPU performance engineering! a few cool resources going into this update: ⠀ 1. Stream-K: why a matmul can leave part of the GPU idle while the last blocks finish, and how dividing the multiply-accumulate work more evenly helps. ⠀ 2. tcgen05 for dummies: gau-nernst builds a Blackwell matmul step by step. Tensor Memory, asynchronous copies and pipelining, with code you can follow as the kernel develops. ⠀ 3. Thinking Machines' Defeating Nondeterminism: how changing the batch can change the order of floating-point additions, and why that can change inference results. then, how to make the kernels batch-invariant. ⠀ 4. Triton's Linear Layouts: how tensor elements are arranged across threads and registers, and the data movement needed to change that arrangement. ⠀ the update also expands the quantization, speculative decoding and hardware references. ⠀ the guide starts with one inference request, then moves through GPU fundamentals, kernels, serving engines and distributed systems. start at the beginning if you're new; use the individual sections when you hit a specific problem. ⠀ if you know a primary source that explains one of these topics better, open a PR.012330
- JVRT @wafer_ai: we're doing a massive update on Wafer's popular open source guide to GPU performance engineering! a few cool resources going into this update: ⠀ 1. Stream-K: why a matmul can leave part of the GPU idle while the last blocks finish, and how dividing the multiply-accumulate work more evenly helps. ⠀ 2. tcgen05 for dummies: gau-nernst builds a Blackwell matmul step by step. Tensor Memory, asynchronous copies and pipelining, with code you can follow as the kernel develops. ⠀ 3. Thinking Machines' Defeating Nondeterminism: how changing the batch can change the order of floating-point additions, and why that can change inference results. then, how to make the kernels batch-invariant. ⠀ 4. Triton's Linear Layouts: how tensor elements are arranged across threads and registers, and the data movement needed to change that arrangement. ⠀ the update also expands the quantization, speculative decoding and hardware references. ⠀ the guide starts with one inference request, then moves through GPU fundamentals, kernels, serving engines and distributed systems. start at the beginning if you're new; use the individual sections when you hit a specific problem. ⠀ if you know a primary source that explains one of these topics better, open a PR.01306.7K
- JVRT @gpuemi: you'll know more about blackwell tuning than 93.73% of people if you fully understand the Blackwell Tuning Guide it covers register limits, thread-block clusters, distributed shared memory, shared-memory carveouts, L2 persistence, and NVLink peer access. follow and save to keep up with the series. links in thread 🧵wafer @wafer_aiwe launched the most comprehensive ai performance engineering repo in the world we're posting every single resource follow and save to keep up with the series. links in thread 🧵 part 14: Blackwell Tuning Guide NVIDIA covers the execution limits, memory hierarchy, and communication mechanisms behind tuning AI workloads on Blackwell: - register budgets, resident warps, and occupancy in fused AI kernels. - shared-memory limits for attention and matmul tiles across Blackwell compute capabilities. - thread-block clusters and distributed shared memory for exchanging tensor data across blocks. - 8-block portable clusters, B200's optional 16-block clusters, and the parallelism tradeoff of larger clusters. - L1/shared-memory carveouts and the balance between caching and explicit tensor staging. - L2 cache persistence for inference kernels that reuse the same tensors. - NVLink peer access and direct tensor transfers between GPUs in model-parallel inference. the guide connects Blackwell's hardware limits to kernel design decisions like tile size, block cooperation, and tensor reuse, helping engineers choose what to test when tuning attention, matmul, and multi-GPU inference.0905.7K
we launched the most comprehensive ai performance engineering repo in the world we're posting every single resource follow and save to keep up with the series. links in thread 🧵 part 14: Blackwell Tuning Guide NVIDIA covers the execution limits, memory hierarchy, and communication mechanisms behind tuning AI workloads on Blackwell: - register budgets, resident warps, and occupancy in fused AI kernels. - shared-memory limits for attention and matmul tiles across Blackwell compute capabilities. - thread-block clusters and distributed shared memory for exchanging tensor data across blocks. - 8-block portable clusters, B200's optional 16-block clusters, and the parallelism tradeoff of larger clusters. - L1/shared-memory carveouts and the balance between caching and explicit tensor staging. - L2 cache persistence for inference kernels that reuse the same tensors. - NVLink peer access and direct tensor transfers between GPUs in model-parallel inference. the guide connects Blackwell's hardware limits to kernel design decisions like tile size, block cooperation, and tensor reuse, helping engineers choose what to test when tuning attention, matmul, and multi-GPU inference.
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